Example Class Topics Topics: ? DRAM and speed-of-light latencies aremajor performance obstacles. Branch prediction and OO execution effectively use transistors to give high performance, but at a power cost. VLIW takes less power, but compiler must guess well. TLP offers improved system performance if work is available (eg servers). Machine code contains insufficient hints over name aliases. Cache coherence is nice to have but consumes power. Message passing software will map better to future hardware platforms ? Each class will start with 10 jargon busters. 1 a b Limits of RISC c Role of custom silicon ? 2 a Wall's Paper b Hyperthreading - ways of using - when is it good ? c Suppose latency DRAM weren't a problem - what would we do different ? 3 a Intel 80 Core Processor ? b IBM Cell Processor ? c