EuroSys 2008 Tutorial

Hands-on with the NetFPGA
to build a Gigabit-rate Router

John W. Lockwood, Andrew W. Moore, Adam Covington, David Miller

Monday, March 31, 2008
9am - 5pm

Department of Computer Science, Glasgow University,
Room 422, Forth floor,
Sir Alwyn Williams Building,
18 Lilybank Gardens, Glasgow G12 8QQ

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An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems. The platform can be used in the classroom to teach students how to build Ethernet switches and Internet Protocol (IP) routers using hardware rather than software. The platform can be used by researchers to prototype advanced services for next-generation networks.

By using Field Programmable Gate Arrays (FPGAs), the NetFPGA enables new types of packet routing circuits to be implemented and detailed measurements of network traffic to be obtained. During the tutorial, we will use the NetFPGA to determine the amount of memory needed to buffer TCP/IP data streaming through the Gigabit/second router. Hardware circuits within the NetFPGA will be implemented to measure and plot the occupancy of buffers. Circuits will be downloaded into reconfigurable hardware and tested with live, streaming Internet video traffic.


Attendees will utilise a Linux-based PC equipped with NetFPGA hardware. A basic understanding of Ethernet switching and network routing is expected. Past experience with Verilog is useful but not required. This full-day tutorial emulates the successful one-day held at Hot Interconnects 2007 and builds upon the half-day tutorial at SIGMETRICS'07. Photos from that event as well as a description of the NetFPGA Platform are available on-line from the homepage.


About the presenters


Tutorial Material

(Including revision notes)

Equipment Notes

A Bill of Materials is available for the PC used at the Eurosys 2008 tutorial.