// CBG Orangepath HPRLS System

module PRIMES(clk, reset);
   reg [3:0] PA[1000:0];
   wire [15:0] k;
   wire [15:0] j;
   wire [15:0] i;
   input reset;
   input clk;
   wire [2:0] pcnet111;
 always @(posedge clk) begin if (pli209bar210) printf("Primes test %i starting
", tnow([29:0])); end
 always @(posedge clk) begin if (pli206bar207) printf("Primes test: cleared array at tnow=%i 
", tnow([29:0])); end
 always @(posedge clk) begin if (pli204) printf("The primes are:"); end
 always @(posedge clk) begin if (pli164) printf("%i ", i([15:0])); end
 always @(posedge clk) begin if (pli116bar117) printf("
"); end
 always @(posedge clk) begin if (pli116bar117) printf("Primes test: complete at tnow=%i.
", tnow([29:0])); end
 always @(posedge clk) begin if (pli116bar117) sysexit(0); end
   DFF it642(pcnet111[3], pcn111641, clk, 1, rst, 0);
   MUX2 ipcn111641(pcn111641, pli209bar210, 0, pcn111640);
   MUX2 ipcn111640(pcn111640, pcn111561, 0, pcn111639);
   MUX2 ipcn111639(pcn111639, pid225, 0, pcn111638);
   MUX2 ipcn111638(pcn111638, pid213bar214, 0, pcn111637);
   MUX2 ipcn111637(pcn111637, pli206bar207, 0, pcn111636);
   MUX2 ipcn111636(pcn111636, pid292, 0, pcn111635);
   MUX2 ipcn111635(pcn111635, pcn111562bar563, 0, pcn111634);
   OR2 ipcn111634(pcn111634, pli204, pcn111633);
   OR2 ipcn111633(pcn111633, pid294bar295, pcn111632);
   MUX2 ipcn111632(pcn111632, pid218, 0, pcn111631);
   MUX2 ipcn111631(pcn111631, pid228, 0, pcn111630);
   OR2 ipcn111630(pcn111630, pcn111564, pcn111629);
   OR2 ipcn111629(pcn111629, pcn111565, pcn111628);
   MUX2 ipcn111628(pcn111628, pcn111567bar568, 0, pcn111627);
   OR2 ipcn111627(pcn111627, pli164, pcn111626);
   OR2 ipcn111626(pcn111626, pcn111569bar570, pcn111625);
   OR2 ipcn111625(pcn111625, pid297bar298, pcnet111[3]);
   DFF it624(pcnet111[2], pcn111623, clk, 1, rst, 0);
   MUX2 ipcn111623(pcn111623, pli209bar210, 0, pcn111622);
   MUX2 ipcn111622(pcn111622, pcn111561, 0, pcn111621);
   MUX2 ipcn111621(pcn111621, pid225, 0, pcn111620);
   MUX2 ipcn111620(pcn111620, pid213bar214, 0, pcn111619);
   OR2 ipcn111619(pcn111619, pli206bar207, pcn111618);
   OR2 ipcn111618(pcn111618, pid292, pcn111617);
   OR2 ipcn111617(pcn111617, pcn111562bar563, pcn111616);
   MUX2 ipcn111616(pcn111616, pli204, 0, pcn111615);
   MUX2 ipcn111615(pcn111615, pid294bar295, 0, pcn111614);
   OR2 ipcn111614(pcn111614, pid218, pcn111613);
   OR2 ipcn111613(pcn111613, pid228, pcn111612);
   MUX2 ipcn111612(pcn111612, pcn111564, 0, pcn111611);
   OR2 ipcn111611(pcn111611, pcn111565, pcn111610);
   OR2 ipcn111610(pcn111610, pcn111567bar568, pcn111609);
   MUX2 ipcn111609(pcn111609, pli164, 0, pcn111608);
   MUX2 ipcn111608(pcn111608, pcn111569bar570, 0, pcn111607);
   MUX2 ipcn111607(pcn111607, pid297bar298, 0, pcnet111[2]);
   DFF it606(pcnet111[1], pcn111605, clk, 1, rst, 0);
   OR2 ipcn111605(pcn111605, pli209bar210, pcn111604);
   MUX2 ipcn111604(pcn111604, pcn111561, 0, pcn111603);
   OR2 ipcn111603(pcn111603, pid225, pcn111602);
   OR2 ipcn111602(pcn111602, pid213bar214, pcn111601);
   OR2 ipcn111601(pcn111601, pli206bar207, pcn111600);
   MUX2 ipcn111600(pcn111600, pid292, 0, pcn111599);
   OR2 ipcn111599(pcn111599, pcn111562bar563, pcn111598);
   MUX2 ipcn111598(pcn111598, pli204, 0, pcn111597);
   OR2 ipcn111597(pcn111597, pid294bar295, pcn111596);
   MUX2 ipcn111596(pcn111596, pid218, 0, pcn111595);
   OR2 ipcn111595(pcn111595, pid228, pcn111594);
   OR2 ipcn111594(pcn111594, pcn111564, pcn111593);
   MUX2 ipcn111593(pcn111593, pcn111565, 0, pcn111592);
   OR2 ipcn111592(pcn111592, pcn111567bar568, pcn111591);
   OR2 ipcn111591(pcn111591, pli164, pcn111590);
   MUX2 ipcn111590(pcn111590, pcn111569bar570, 0, pcn111589);
   OR2 ipcn111589(pcn111589, pid297bar298, pcnet111[1]);
   DFF it588(pcnet111[0], pcn111587, clk, 1, rst, 0);
   MUX2 ipcn111587(pcn111587, pli209bar210, 0, pcn111586);
   OR2 ipcn111586(pcn111586, pcn111561, pcn111585);
   OR2 ipcn111585(pcn111585, pid225, pcn111584);
   MUX2 ipcn111584(pcn111584, pid213bar214, 0, pcn111583);
   OR2 ipcn111583(pcn111583, pli206bar207, pcn111582);
   MUX2 ipcn111582(pcn111582, pid292, 0, pcn111581);
   MUX2 ipcn111581(pcn111581, pcn111562bar563, 0, pcn111580);
   MUX2 ipcn111580(pcn111580, pli204, 0, pcn111579);
   MUX2 ipcn111579(pcn111579, pid294bar295, 0, pcn111578);
   OR2 ipcn111578(pcn111578, pid218, pcn111577);
   OR2 ipcn111577(pcn111577, pid228, pcn111576);
   OR2 ipcn111576(pcn111576, pcn111564, pcn111575);
   MUX2 ipcn111575(pcn111575, pcn111565, 0, pcn111574);
   MUX2 ipcn111574(pcn111574, pcn111567bar568, 0, pcn111573);
   OR2 ipcn111573(pcn111573, pli164, pcn111572);
   OR2 ipcn111572(pcn111572, pcn111569bar570, pcn111571);
   MUX2 ipcn111571(pcn111571, pid297bar298, 0, pcnet111[0]);
   INV ipcn111569bar570(pcn111569bar570, pcn111569);
   OR2 ipcn111569(pcn111569, pcnet1113bar112, pli205);
   INV ipcn111567bar568(pcn111567bar568, pcn111567);
   OR2 ipcn111567(pcn111567, pcnet111[3], pcn111566);
   OR2 ipcn111566(pcn111566, pcnet1112bar113, pid211);
   AND2 ipcn111565(pcn111565, pli121bar122, pli155bar224);
   AND2 ipcn111564(pcn111564, pli156bar157bar158, pli161bar162);
   INV ipcn111562bar563(pcn111562bar563, pcn111562);
   OR2 ipcn111562(pcn111562, pcnet111[3], pli115);
   AND2 ipcn111561(pcn111561, pid222bar223, pli155);
   DFF it560(i[15], pid559, clk, pid321, rst, 0);
   MUX2 ipid559(pid559, pli209bar210, 0, pid558);
   MUX2 ipid558(pid558, pid213bar214, pid545, pid557);
   MUX2 ipid557(pid557, pid292, pid549, pid556);
   MUX2 ipid556(pid556, pid294bar295, 0, pid555);
   MUX2 ipid555(pid555, pid218, pid554, pid545);
   XOR2 ipid554(pid554, pid550, pid553);
   OR2 ipid553(pid553, pid551, pid552);
   AND2 ipid552(pid552, i[14], j[14]);
   AND2 ipid551(pid551, pid533, pid536);
   XOR2 ipid550(pid550, i[15], j[15]);
   XOR2 ipid549(pid549, pid546, pid548);
   OR2 ipid548(pid548, pid547, j[14]);
   AND2 ipid547(pid547, pid529, pid531);
   XOR2 ipid546(pid546, j[15], j[15]);
   XOR2 ipid545(pid545, i[15], pid544);
   AND2 ipid544(pid544, i[14], pid527);
   DFF it543(i[14], pid542, clk, pid321, rst, 0);
   MUX2 ipid542(pid542, pli209bar210, 0, pid541);
   MUX2 ipid541(pid541, pid213bar214, pid528, pid540);
   MUX2 ipid540(pid540, pid292, pid532, pid539);
   MUX2 ipid539(pid539, pid294bar295, 0, pid538);
   MUX2 ipid538(pid538, pid218, pid537, pid528);
   XOR2 ipid537(pid537, pid533, pid536);
   OR2 ipid536(pid536, pid534, pid535);
   AND2 ipid535(pid535, i[13], j[13]);
   AND2 ipid534(pid534, pid516, pid519);
   XOR2 ipid533(pid533, i[14], j[14]);
   XOR2 ipid532(pid532, pid529, pid531);
   OR2 ipid531(pid531, pid530, j[13]);
   AND2 ipid530(pid530, pid512, pid514);
   XOR2 ipid529(pid529, j[14], j[14]);
   XOR2 ipid528(pid528, i[14], pid527);
   AND2 ipid527(pid527, i[13], pid510);
   DFF it526(i[13], pid525, clk, pid321, rst, 0);
   MUX2 ipid525(pid525, pli209bar210, 0, pid524);
   MUX2 ipid524(pid524, pid213bar214, pid511, pid523);
   MUX2 ipid523(pid523, pid292, pid515, pid522);
   MUX2 ipid522(pid522, pid294bar295, 0, pid521);
   MUX2 ipid521(pid521, pid218, pid520, pid511);
   XOR2 ipid520(pid520, pid516, pid519);
   OR2 ipid519(pid519, pid517, pid518);
   AND2 ipid518(pid518, i[12], j[12]);
   AND2 ipid517(pid517, pid499, pid502);
   XOR2 ipid516(pid516, i[13], j[13]);
   XOR2 ipid515(pid515, pid512, pid514);
   OR2 ipid514(pid514, pid513, j[12]);
   AND2 ipid513(pid513, pid495, pid497);
   XOR2 ipid512(pid512, j[13], j[13]);
   XOR2 ipid511(pid511, i[13], pid510);
   AND2 ipid510(pid510, i[12], pid493);
   DFF it509(i[12], pid508, clk, pid321, rst, 0);
   MUX2 ipid508(pid508, pli209bar210, 0, pid507);
   MUX2 ipid507(pid507, pid213bar214, pid494, pid506);
   MUX2 ipid506(pid506, pid292, pid498, pid505);
   MUX2 ipid505(pid505, pid294bar295, 0, pid504);
   MUX2 ipid504(pid504, pid218, pid503, pid494);
   XOR2 ipid503(pid503, pid499, pid502);
   OR2 ipid502(pid502, pid500, pid501);
   AND2 ipid501(pid501, i[11], j[11]);
   AND2 ipid500(pid500, pid482, pid485);
   XOR2 ipid499(pid499, i[12], j[12]);
   XOR2 ipid498(pid498, pid495, pid497);
   OR2 ipid497(pid497, pid496, j[11]);
   AND2 ipid496(pid496, pid478, pid480);
   XOR2 ipid495(pid495, j[12], j[12]);
   XOR2 ipid494(pid494, i[12], pid493);
   AND2 ipid493(pid493, i[11], pid476);
   DFF it492(i[11], pid491, clk, pid321, rst, 0);
   MUX2 ipid491(pid491, pli209bar210, 0, pid490);
   MUX2 ipid490(pid490, pid213bar214, pid477, pid489);
   MUX2 ipid489(pid489, pid292, pid481, pid488);
   MUX2 ipid488(pid488, pid294bar295, 0, pid487);
   MUX2 ipid487(pid487, pid218, pid486, pid477);
   XOR2 ipid486(pid486, pid482, pid485);
   OR2 ipid485(pid485, pid483, pid484);
   AND2 ipid484(pid484, i[10], j[10]);
   AND2 ipid483(pid483, pid465, pid468);
   XOR2 ipid482(pid482, i[11], j[11]);
   XOR2 ipid481(pid481, pid478, pid480);
   OR2 ipid480(pid480, pid479, j[10]);
   AND2 ipid479(pid479, pid461, pid463);
   XOR2 ipid478(pid478, j[11], j[11]);
   XOR2 ipid477(pid477, i[11], pid476);
   AND2 ipid476(pid476, i[10], pid459);
   DFF it475(i[10], pid474, clk, pid321, rst, 0);
   MUX2 ipid474(pid474, pli209bar210, 0, pid473);
   MUX2 ipid473(pid473, pid213bar214, pid460, pid472);
   MUX2 ipid472(pid472, pid292, pid464, pid471);
   MUX2 ipid471(pid471, pid294bar295, 0, pid470);
   MUX2 ipid470(pid470, pid218, pid469, pid460);
   XOR2 ipid469(pid469, pid465, pid468);
   OR2 ipid468(pid468, pid466, pid467);
   AND2 ipid467(pid467, i[9], j[9]);
   AND2 ipid466(pid466, pid448, pid451);
   XOR2 ipid465(pid465, i[10], j[10]);
   XOR2 ipid464(pid464, pid461, pid463);
   OR2 ipid463(pid463, pid462, j[9]);
   AND2 ipid462(pid462, pid444, pid446);
   XOR2 ipid461(pid461, j[10], j[10]);
   XOR2 ipid460(pid460, i[10], pid459);
   AND2 ipid459(pid459, i[9], pid442);
   DFF it458(i[9], pid457, clk, pid321, rst, 0);
   MUX2 ipid457(pid457, pli209bar210, 0, pid456);
   MUX2 ipid456(pid456, pid213bar214, pid443, pid455);
   MUX2 ipid455(pid455, pid292, pid447, pid454);
   MUX2 ipid454(pid454, pid294bar295, 0, pid453);
   MUX2 ipid453(pid453, pid218, pid452, pid443);
   XOR2 ipid452(pid452, pid448, pid451);
   OR2 ipid451(pid451, pid449, pid450);
   AND2 ipid450(pid450, i[8], j[8]);
   AND2 ipid449(pid449, pid431, pid434);
   XOR2 ipid448(pid448, i[9], j[9]);
   XOR2 ipid447(pid447, pid444, pid446);
   OR2 ipid446(pid446, pid445, j[8]);
   AND2 ipid445(pid445, pid427, pid429);
   XOR2 ipid444(pid444, j[9], j[9]);
   XOR2 ipid443(pid443, i[9], pid442);
   AND2 ipid442(pid442, i[8], pid425);
   DFF it441(i[8], pid440, clk, pid321, rst, 0);
   MUX2 ipid440(pid440, pli209bar210, 0, pid439);
   MUX2 ipid439(pid439, pid213bar214, pid426, pid438);
   MUX2 ipid438(pid438, pid292, pid430, pid437);
   MUX2 ipid437(pid437, pid294bar295, 0, pid436);
   MUX2 ipid436(pid436, pid218, pid435, pid426);
   XOR2 ipid435(pid435, pid431, pid434);
   OR2 ipid434(pid434, pid432, pid433);
   AND2 ipid433(pid433, i[7], j[7]);
   AND2 ipid432(pid432, pid414, pid417);
   XOR2 ipid431(pid431, i[8], j[8]);
   XOR2 ipid430(pid430, pid427, pid429);
   OR2 ipid429(pid429, pid428, j[7]);
   AND2 ipid428(pid428, pid410, pid412);
   XOR2 ipid427(pid427, j[8], j[8]);
   XOR2 ipid426(pid426, i[8], pid425);
   AND2 ipid425(pid425, i[7], pid408);
   DFF it424(i[7], pid423, clk, pid321, rst, 0);
   MUX2 ipid423(pid423, pli209bar210, 0, pid422);
   MUX2 ipid422(pid422, pid213bar214, pid409, pid421);
   MUX2 ipid421(pid421, pid292, pid413, pid420);
   MUX2 ipid420(pid420, pid294bar295, 0, pid419);
   MUX2 ipid419(pid419, pid218, pid418, pid409);
   XOR2 ipid418(pid418, pid414, pid417);
   OR2 ipid417(pid417, pid415, pid416);
   AND2 ipid416(pid416, i[6], j[6]);
   AND2 ipid415(pid415, pid397, pid400);
   XOR2 ipid414(pid414, i[7], j[7]);
   XOR2 ipid413(pid413, pid410, pid412);
   OR2 ipid412(pid412, pid411, j[6]);
   AND2 ipid411(pid411, pid393, pid395);
   XOR2 ipid410(pid410, j[7], j[7]);
   XOR2 ipid409(pid409, i[7], pid408);
   AND2 ipid408(pid408, i[6], pid391);
   DFF it407(i[6], pid406, clk, pid321, rst, 0);
   MUX2 ipid406(pid406, pli209bar210, 0, pid405);
   MUX2 ipid405(pid405, pid213bar214, pid392, pid404);
   MUX2 ipid404(pid404, pid292, pid396, pid403);
   MUX2 ipid403(pid403, pid294bar295, 0, pid402);
   MUX2 ipid402(pid402, pid218, pid401, pid392);
   XOR2 ipid401(pid401, pid397, pid400);
   OR2 ipid400(pid400, pid398, pid399);
   AND2 ipid399(pid399, i[5], j[5]);
   AND2 ipid398(pid398, pid380, pid383);
   XOR2 ipid397(pid397, i[6], j[6]);
   XOR2 ipid396(pid396, pid393, pid395);
   OR2 ipid395(pid395, pid394, j[5]);
   AND2 ipid394(pid394, pid376, pid378);
   XOR2 ipid393(pid393, j[6], j[6]);
   XOR2 ipid392(pid392, i[6], pid391);
   AND2 ipid391(pid391, i[5], pid374);
   DFF it390(i[5], pid389, clk, pid321, rst, 0);
   MUX2 ipid389(pid389, pli209bar210, 0, pid388);
   MUX2 ipid388(pid388, pid213bar214, pid375, pid387);
   MUX2 ipid387(pid387, pid292, pid379, pid386);
   MUX2 ipid386(pid386, pid294bar295, 0, pid385);
   MUX2 ipid385(pid385, pid218, pid384, pid375);
   XOR2 ipid384(pid384, pid380, pid383);
   OR2 ipid383(pid383, pid381, pid382);
   AND2 ipid382(pid382, i[4], j[4]);
   AND2 ipid381(pid381, pid363, pid366);
   XOR2 ipid380(pid380, i[5], j[5]);
   XOR2 ipid379(pid379, pid376, pid378);
   OR2 ipid378(pid378, pid377, j[4]);
   AND2 ipid377(pid377, pid359, pid361);
   XOR2 ipid376(pid376, j[5], j[5]);
   XOR2 ipid375(pid375, i[5], pid374);
   AND2 ipid374(pid374, i[4], pid357);
   DFF it373(i[4], pid372, clk, pid321, rst, 0);
   MUX2 ipid372(pid372, pli209bar210, 0, pid371);
   MUX2 ipid371(pid371, pid213bar214, pid358, pid370);
   MUX2 ipid370(pid370, pid292, pid362, pid369);
   MUX2 ipid369(pid369, pid294bar295, 0, pid368);
   MUX2 ipid368(pid368, pid218, pid367, pid358);
   XOR2 ipid367(pid367, pid363, pid366);
   OR2 ipid366(pid366, pid364, pid365);
   AND2 ipid365(pid365, i[3], j[3]);
   AND2 ipid364(pid364, pid346, pid349);
   XOR2 ipid363(pid363, i[4], j[4]);
   XOR2 ipid362(pid362, pid359, pid361);
   OR2 ipid361(pid361, pid360, j[3]);
   AND2 ipid360(pid360, pid342, pid344);
   XOR2 ipid359(pid359, j[4], j[4]);
   XOR2 ipid358(pid358, i[4], pid357);
   AND2 ipid357(pid357, i[3], pid340);
   DFF it356(i[3], pid355, clk, pid321, rst, 0);
   MUX2 ipid355(pid355, pli209bar210, 0, pid354);
   MUX2 ipid354(pid354, pid213bar214, pid341, pid353);
   MUX2 ipid353(pid353, pid292, pid345, pid352);
   MUX2 ipid352(pid352, pid294bar295, 0, pid351);
   MUX2 ipid351(pid351, pid218, pid350, pid341);
   XOR2 ipid350(pid350, pid346, pid349);
   OR2 ipid349(pid349, pid347, pid348);
   AND2 ipid348(pid348, i[2], j[2]);
   AND2 ipid347(pid347, pid329, pid332);
   XOR2 ipid346(pid346, i[3], j[3]);
   XOR2 ipid345(pid345, pid342, pid344);
   OR2 ipid344(pid344, pid343, j[2]);
   AND2 ipid343(pid343, pid325, pid327);
   XOR2 ipid342(pid342, j[3], j[3]);
   XOR2 ipid341(pid341, i[3], pid340);
   AND2 ipid340(pid340, i[2], pid323);
   DFF it339(i[2], pid338, clk, pid321, rst, 0);
   MUX2 ipid338(pid338, pli209bar210, 0, pid337);
   MUX2 ipid337(pid337, pid213bar214, pid324, pid336);
   MUX2 ipid336(pid336, pid292, pid328, pid335);
   MUX2 ipid335(pid335, pid294bar295, 0, pid334);
   MUX2 ipid334(pid334, pid218, pid333, pid324);
   XOR2 ipid333(pid333, pid329, pid332);
   OR2 ipid332(pid332, pid330, pid331);
   AND2 ipid331(pid331, i[1], j[1]);
   AND2 ipid330(pid330, pid309, pid310);
   XOR2 ipid329(pid329, i[2], j[2]);
   XOR2 ipid328(pid328, pid325, pid327);
   OR2 ipid327(pid327, pid326, j[1]);
   AND2 ipid326(pid326, pid307, j[0]);
   XOR2 ipid325(pid325, j[2], j[2]);
   XOR2 ipid324(pid324, i[2], pid323);
   AND2 ipid323(pid323, i[1], i[0]);
   DFF it322(i[1], pid316, clk, pid321, rst, 0);
   OR2 ipid321(pid321, pli209bar210, pid320);
   OR2 ipid320(pid320, pid213bar214, pid319);
   OR2 ipid319(pid319, pid292, pid318);
   OR2 ipid318(pid318, pid294bar295, pid317);
   OR2 ipid317(pid317, pid218, pid297bar298);
   MUX2 ipid316(pid316, pli209bar210, 0, pid315);
   MUX2 ipid315(pid315, pid213bar214, pid306, pid314);
   MUX2 ipid314(pid314, pid292, pid308, pid313);
   MUX2 ipid313(pid313, pid294bar295, 0, pid312);
   MUX2 ipid312(pid312, pid218, pid311, pid306);
   XOR2 ipid311(pid311, pid309, pid310);
   AND2 ipid310(pid310, i[0], j[0]);
   XOR2 ipid309(pid309, i[1], j[1]);
   XOR2 ipid308(pid308, pid307, j[0]);
   XOR2 ipid307(pid307, j[1], j[1]);
   XOR2 ipid306(pid306, i[1], i[0]);
   DFF it305(i[0], pid304, clk, 1, rst, 0);
   MUX2 ipid304(pid304, pli209bar210, 0, pid303);
   MUX2 ipid303(pid303, pid213bar214, ibar291, pid302);
   MUX2 ipid302(pid302, pid292, pid293, pid301);
   OR2 ipid301(pid301, pid294bar295, pid300);
   MUX2 ipid300(pid300, pid218, pid296, pid299);
   MUX2 ipid299(pid299, pid297bar298, ibar291, i[0]);
   INV ipid297bar298(pid297bar298, pid297);
   OR2 ipid297(pid297, pcnet1113bar112, pid212);
   XOR2 ipid296(pid296, i[0], j[0]);
   INV ipid294bar295(pid294bar295, pid294);
   OR2 ipid294(pid294, pcnet1113bar112, pli208);
   XOR2 ipid293(pid293, j[0], j[0]);
   AND2 ipid292(pid292, pli168bar169, pli202);
   INV iibar291(ibar291, i[0]);
   DFF it290(j[15], pid289, clk, pid229, rst, 0);
   MUX2 ipid289(pid289, pid225, 0, pid288);
   XOR2 ipid288(pid288, j[15], pid287);
   AND2 ipid287(pid287, j[14], pid283);
   DFF it286(j[14], pid285, clk, pid229, rst, 0);
   MUX2 ipid285(pid285, pid225, 0, pid284);
   XOR2 ipid284(pid284, j[14], pid283);
   AND2 ipid283(pid283, j[13], pid279);
   DFF it282(j[13], pid281, clk, pid229, rst, 0);
   MUX2 ipid281(pid281, pid225, 0, pid280);
   XOR2 ipid280(pid280, j[13], pid279);
   AND2 ipid279(pid279, j[12], pid275);
   DFF it278(j[12], pid277, clk, pid229, rst, 0);
   MUX2 ipid277(pid277, pid225, 0, pid276);
   XOR2 ipid276(pid276, j[12], pid275);
   AND2 ipid275(pid275, j[11], pid271);
   DFF it274(j[11], pid273, clk, pid229, rst, 0);
   MUX2 ipid273(pid273, pid225, 0, pid272);
   XOR2 ipid272(pid272, j[11], pid271);
   AND2 ipid271(pid271, j[10], pid267);
   DFF it270(j[10], pid269, clk, pid229, rst, 0);
   MUX2 ipid269(pid269, pid225, 0, pid268);
   XOR2 ipid268(pid268, j[10], pid267);
   AND2 ipid267(pid267, j[9], pid263);
   DFF it266(j[9], pid265, clk, pid229, rst, 0);
   MUX2 ipid265(pid265, pid225, 0, pid264);
   XOR2 ipid264(pid264, j[9], pid263);
   AND2 ipid263(pid263, j[8], pid259);
   DFF it262(j[8], pid261, clk, pid229, rst, 0);
   MUX2 ipid261(pid261, pid225, 0, pid260);
   XOR2 ipid260(pid260, j[8], pid259);
   AND2 ipid259(pid259, j[7], pid255);
   DFF it258(j[7], pid257, clk, pid229, rst, 0);
   MUX2 ipid257(pid257, pid225, 0, pid256);
   XOR2 ipid256(pid256, j[7], pid255);
   AND2 ipid255(pid255, j[6], pid251);
   DFF it254(j[6], pid253, clk, pid229, rst, 0);
   MUX2 ipid253(pid253, pid225, 0, pid252);
   XOR2 ipid252(pid252, j[6], pid251);
   AND2 ipid251(pid251, j[5], pid247);
   DFF it250(j[5], pid249, clk, pid229, rst, 0);
   MUX2 ipid249(pid249, pid225, 0, pid248);
   XOR2 ipid248(pid248, j[5], pid247);
   AND2 ipid247(pid247, j[4], pid243);
   DFF it246(j[4], pid245, clk, pid229, rst, 0);
   MUX2 ipid245(pid245, pid225, 0, pid244);
   XOR2 ipid244(pid244, j[4], pid243);
   AND2 ipid243(pid243, j[3], pid239);
   DFF it242(j[3], pid241, clk, pid229, rst, 0);
   MUX2 ipid241(pid241, pid225, 0, pid240);
   XOR2 ipid240(pid240, j[3], pid239);
   AND2 ipid239(pid239, j[2], pid235);
   DFF it238(j[2], pid237, clk, pid229, rst, 0);
   MUX2 ipid237(pid237, pid225, 0, pid236);
   XOR2 ipid236(pid236, j[2], pid235);
   AND2 ipid235(pid235, j[1], j[0]);
   DFF it234(j[1], pid233, clk, 1, rst, 0);
   OR2 ipid233(pid233, pid225, pid232);
   MUX2 ipid232(pid232, pid228, pid231, j[1]);
   XOR2 ipid231(pid231, j[1], j[0]);
   DFF it230(j[0], pid227, clk, pid229, rst, 0);
   OR2 ipid229(pid229, pid225, pid228);
   AND2 ipid228(pid228, pid216bar217, pli155bar224);
   MUX2 ipid227(pid227, pid225, 0, jbar226);
   INV ijbar226(jbar226, j[0]);
   AND2 ipid225(pid225, pid222bar223, pli155bar224);
   INV ipli155bar224(pli155bar224, pli155);
   INV ipid222bar223(pid222bar223, pid222);
   OR2 ipid222(pid222, pcnet111[3], pli120);
 always @(posedge clk) begin if (pid221) [3:0] PA [999:0][i([15:0])][3] <= 0; end
 always @(posedge clk) begin if (pid221) [3:0] PA [999:0][i([15:0])][2] <= 0; end
 always @(posedge clk) begin if (pid221) [3:0] PA [999:0][i([15:0])][1] <= 0; end
   OR2 ipid221(pid221, pid213bar214, pid218);
 always @(posedge clk) begin [3:0] PA [999:0][i([15:0])][0] <= pid220; end
   OR2 ipid220(pid220, pid213bar214, pid219);
   MUX2 ipid219(pid219, pid218, 0, [3:0] PA [999:0][i([15:0])][0]);
   AND2 ipid218(pid218, pid216bar217, pli155);
   INV ipid216bar217(pid216bar217, pid216);
   OR2 ipid216(pid216, pcnet111[3], pid215);
   OR2 ipid215(pid215, pcnet1112bar113, pli119);
   INV ipid213bar214(pid213bar214, pid213);
   OR2 ipid213(pid213, pcnet111[3], pid212);
   OR2 ipid212(pid212, pcnet111[2], pid211);
   OR2 ipid211(pid211, pcnet111[1], pcnet111bar165);
   INV ipli209bar210(pli209bar210, pli209);
   OR2 ipli209(pli209, pcnet111[3], pli208);
   OR2 ipli208(pli208, pcnet111[2], pli114);
   INV ipli206bar207(pli206bar207, pli206);
   OR2 ipli206(pli206, pcnet111[3], pli205);
   OR2 ipli205(pli205, pcnet111[2], pli166);
   AND2 ipli204(pli204, pli168bar169, pli202bar203);
   INV ipli202bar203(pli202bar203, pli202);
   AND2 ipli202(pli202, j15bar170, pli201);
   AND2 ipli201(pli201, j14bar171, pli200);
   AND2 ipli200(pli200, j13bar172, pli199);
   AND2 ipli199(pli199, j12bar173, pli198);
   AND2 ipli198(pli198, j11bar174, pli197);
   AND2 ipli197(pli197, j10bar175, pli196);
   AND2 ipli196(pli196, j9bar176, pli195);
   AND2 ipli195(pli195, j8bar177, pli194);
   AND2 ipli194(pli194, j7bar178, pli193);
   AND2 ipli193(pli193, j6bar179, pli192);
   OR2 ipli192(pli192, j5bar180, pli191);
   AND2 ipli191(pli191, j5bar180bar181, pli190);
   OR2 ipli190(pli190, j4bar182, pli189);
   AND2 ipli189(pli189, j4bar182bar183, pli188);
   AND2 ipli188(pli188, j3bar184, pli187);
   AND2 ipli187(pli187, j2bar185, j1bar186);
   INV ij1bar186(j1bar186, j[1]);
   INV ij2bar185(j2bar185, j[2]);
   INV ij3bar184(j3bar184, j[3]);
   INV ij4bar182bar183(j4bar182bar183, j4bar182);
   INV ij4bar182(j4bar182, j[4]);
   INV ij5bar180bar181(j5bar180bar181, j5bar180);
   INV ij5bar180(j5bar180, j[5]);
   INV ij6bar179(j6bar179, j[6]);
   INV ij7bar178(j7bar178, j[7]);
   INV ij8bar177(j8bar177, j[8]);
   INV ij9bar176(j9bar176, j[9]);
   INV ij10bar175(j10bar175, j[10]);
   INV ij11bar174(j11bar174, j[11]);
   INV ij12bar173(j12bar173, j[12]);
   INV ij13bar172(j13bar172, j[13]);
   INV ij14bar171(j14bar171, j[14]);
   INV ij15bar170(j15bar170, j[15]);
   INV ipli168bar169(pli168bar169, pli168);
   OR2 ipli168(pli168, pcnet111[3], pli167);
   OR2 ipli167(pli167, pcnet1112bar113, pli166);
   OR2 ipli166(pli166, pcnet1111bar118, pcnet111bar165);
   INV ipcnet111bar165(pcnet111bar165, pcnet111[0]);
   AND2 ipli164(pli164, pli156bar157bar158, pli161bar162bar163);
   INV ipli161bar162bar163(pli161bar162bar163, pli161bar162);
   INV ipli161bar162(pli161bar162, pli161);
   OR2 ipli161(pli161, [3:0] PA [999:0][i([15:0])][0], pli160);
   OR2 ipli160(pli160, [3:0] PA [999:0][i([15:0])][1], pli159);
   OR2 ipli159(pli159, [3:0] PA [999:0][i([15:0])][2], [3:0] PA [999:0][i([15:0])][3]);
   INV ipli156bar157bar158(pli156bar157bar158, pli156bar157);
   INV ipli156bar157(pli156bar157, pli156);
   AND2 ipli156(pli156, pli121bar122, pli155);
   AND2 ipli155(pli155, i15bar123, pli154);
   AND2 ipli154(pli154, i14bar124, pli153);
   AND2 ipli153(pli153, i13bar125, pli152);
   AND2 ipli152(pli152, i12bar126, pli151);
   AND2 ipli151(pli151, i11bar127, pli150);
   AND2 ipli150(pli150, i10bar128, pli149);
   AND2 ipli149(pli149, i9bar129, pli148);
   AND2 ipli148(pli148, i8bar130, pli147);
   AND2 ipli147(pli147, i7bar131, pli146);
   AND2 ipli146(pli146, i6bar132, pli145);
   OR2 ipli145(pli145, i5bar133, pli144);
   AND2 ipli144(pli144, i5bar133bar134, pli143);
   OR2 ipli143(pli143, i4bar135, pli142);
   AND2 ipli142(pli142, i4bar135bar136, pli141);
   AND2 ipli141(pli141, i3bar137, pli140);
   AND2 ipli140(pli140, i2bar138, i1bar139);
   INV ii1bar139(i1bar139, i[1]);
   INV ii2bar138(i2bar138, i[2]);
   INV ii3bar137(i3bar137, i[3]);
   INV ii4bar135bar136(i4bar135bar136, i4bar135);
   INV ii4bar135(i4bar135, i[4]);
   INV ii5bar133bar134(i5bar133bar134, i5bar133);
   INV ii5bar133(i5bar133, i[5]);
   INV ii6bar132(i6bar132, i[6]);
   INV ii7bar131(i7bar131, i[7]);
   INV ii8bar130(i8bar130, i[8]);
   INV ii9bar129(i9bar129, i[9]);
   INV ii10bar128(i10bar128, i[10]);
   INV ii11bar127(i11bar127, i[11]);
   INV ii12bar126(i12bar126, i[12]);
   INV ii13bar125(i13bar125, i[13]);
   INV ii14bar124(i14bar124, i[14]);
   INV ii15bar123(i15bar123, i[15]);
   INV ipli121bar122(pli121bar122, pli121);
   OR2 ipli121(pli121, pcnet1113bar112, pli120);
   OR2 ipli120(pli120, pcnet111[2], pli119);
   OR2 ipli119(pli119, pcnet1111bar118, pcnet111[0]);
   INV ipcnet1111bar118(pcnet1111bar118, pcnet111[1]);
   INV ipli116bar117(pli116bar117, pli116);
   OR2 ipli116(pli116, pcnet1113bar112, pli115);
   OR2 ipli115(pli115, pcnet1112bar113, pli114);
   OR2 ipli114(pli114, pcnet111[1], pcnet111[0]);
   INV ipcnet1112bar113(pcnet1112bar113, pcnet111[2]);
   INV ipcnet1113bar112(pcnet1113bar112, pcnet111[3]);
endmodule