0: ; iospace: 49552=49152+400 EQU tnow ; tnow[65535..0] 1: ; iospace: 49554=49152+402 EQU i ; i[65535..0] 2: ; iospace: 49556=49152+404 EQU j ; j[65535..0] 3: ; iospace: 49558=49152+406 EQU k ; k[65535..0] 4: ; iospace: 49560=49152+408 EQU PA ; PA[15..0][1000] 5: ; Start of VM compile 6: lodi R999,=0 7: lod R0,tnow[R999] 8: push R0 9: lodi R0,=LIT113; 219 10: push R0 11: jsr printf ; -1 12: disc =2 13: lodi R0,=0:num; 0 14: str R0,i[R999] 15: _LL102: 16: lod R0,i[R999] 17: lodi R1,=50:num; 50 18: cmi R2,R0, R1 19: brz R2,_LL101 ; 29 20: _LWC115: 21: lodi R2,=1:num; 1 22: lod R1,i[R999] 23: str R2,PA[R1] 24: lod R1,i[R999] 25: lodi R2,=1:num; 1 26: add R0,R1, R2 27: str R0,i[R999] 28: jmp _LL102 ; 15 29: _LL101: 30: lodi R0,=2:num; 2 31: str R0,j[R999] 32: _LWC119: 33: lod R0,tnow[R999] 34: push R0 35: lodi R0,=LIT120; 178 36: push R0 37: jsr printf ; -1 38: disc =2 39: _LL104: 40: lod R0,j[R999] 41: lodi R2,=50:num; 50 42: cmi R1,R0, R2 43: brz R1,_LL103 ; 69 44: lod R1,j[R999] 45: lod R2,j[R999] 46: add R0,R1, R2 47: str R0,i[R999] 48: _LWC122: 49: _LL106: 50: lod R0,i[R999] 51: lodi R2,=50:num; 50 52: cmi R1,R0, R2 53: brz R1,_LL105 ; 63 54: lodi R1,=0:num; 0 55: lod R2,i[R999] 56: str R1,PA[R2] 57: lod R2,i[R999] 58: lod R1,j[R999] 59: add R0,R2, R1 60: str R0,i[R999] 61: _LWC125: 62: jmp _LL106 ; 49 63: _LL105: 64: lod R0,j[R999] 65: lodi R1,=1:num; 1 66: add R2,R0, R1 67: str R2,j[R999] 68: jmp _LL104 ; 39 69: _LL103: 70: lodi R2,=LIT127; 161 71: push R2 72: jsr printf ; -1 73: disc =1 74: _LWC128: 75: lodi R2,=1:num; 1 76: str R2,i[R999] 77: _LL108: 78: lod R2,i[R999] 79: lodi R1,=50:num; 50 80: cmi R0,R2, R1 81: brz R0,_LL107 ; 98 82: lod R0,i[R999] 83: lod R1,PA[R0] 84: brz R1,_LL109 ; 91 85: lod R1,i[R999] 86: push R1 87: lodi R1,=LIT130; 156 88: push R1 89: jsr printf ; -1 90: disc =2 91: _LL109: 92: _LWC131: 93: lod R1,i[R999] 94: lodi R0,=1:num; 1 95: add R2,R1, R0 96: str R2,i[R999] 97: jmp _LL108 ; 77 98: _LL107: 99: _LWC133: 100: lodi R2,=LIT134; 153 101: push R2 102: jsr printf ; -1 103: disc =1 104: lod R2,tnow[R999] 105: push R2 106: lodi R2,=LIT135; 117 107: push R2 108: jsr printf ; -1 109: disc =2 110: lodi R2,=0:num; 0 111: push R2 112: jsr sysexit ; -1 113: disc =1 114: stop 115: ; Start of litpool 116: LIT135: 117: defs 80; P 118: defs 114; r 119: defs 105; i 120: defs 109; m 121: defs 101; e 122: defs 115; s 123: defs 32; 124: defs 116; t 125: defs 101; e 126: defs 115; s 127: defs 116; t 128: defs 58; : 129: defs 32; 130: defs 99; c 131: defs 111; o 132: defs 109; m 133: defs 112; p 134: defs 108; l 135: defs 101; e 136: defs 116; t 137: defs 101; e 138: defs 32; 139: defs 97; a 140: defs 116; t 141: defs 32; 142: defs 116; t 143: defs 110; n 144: defs 111; o 145: defs 119; w 146: defs 61; = 147: defs 37; % 148: defs 105; i 149: defs 46; . 150: defs 10; 151: defs 0; 152: LIT134: 153: defs 10; 154: defs 0; 155: LIT130: 156: defs 37; % 157: defs 105; i 158: defs 32; 159: defs 0; 160: LIT127: 161: defs 84; T 162: defs 104; h 163: defs 101; e 164: defs 32; 165: defs 112; p 166: defs 114; r 167: defs 105; i 168: defs 109; m 169: defs 101; e 170: defs 115; s 171: defs 32; 172: defs 97; a 173: defs 114; r 174: defs 101; e 175: defs 58; : 176: defs 0; 177: LIT120: 178: defs 80; P 179: defs 114; r 180: defs 105; i 181: defs 109; m 182: defs 101; e 183: defs 115; s 184: defs 32; 185: defs 116; t 186: defs 101; e 187: defs 115; s 188: defs 116; t 189: defs 58; : 190: defs 32; 191: defs 99; c 192: defs 108; l 193: defs 101; e 194: defs 97; a 195: defs 114; r 196: defs 101; e 197: defs 100; d 198: defs 32; 199: defs 97; a 200: defs 114; r 201: defs 114; r 202: defs 97; a 203: defs 121; y 204: defs 32; 205: defs 97; a 206: defs 116; t 207: defs 32; 208: defs 116; t 209: defs 110; n 210: defs 111; o 211: defs 119; w 212: defs 61; = 213: defs 37; % 214: defs 105; i 215: defs 32; 216: defs 10; 217: defs 0; 218: LIT113: 219: defs 80; P 220: defs 114; r 221: defs 105; i 222: defs 109; m 223: defs 101; e 224: defs 115; s 225: defs 32; 226: defs 116; t 227: defs 101; e 228: defs 115; s 229: defs 116; t 230: defs 32; 231: defs 37; % 232: defs 105; i 233: defs 32; 234: defs 115; s 235: defs 116; t 236: defs 97; a 237: defs 114; r 238: defs 116; t 239: defs 105; i 240: defs 110; n 241: defs 103; g 242: defs 10; 243: defs 0; 244: ; End of litpool 245: ; End of VM compile barrier 49155 sysexit 49154 printf 49153 pause 49152 LIT113 219 LIT120 178 LIT127 161 LIT130 156 LIT134 153 LIT135 117 _LWC133 99 _LL107 98 _LWC131 92 _LL109 91 _LL108 77 _LWC128 74 _LL103 69 _LL105 63 _LWC125 61 _LL106 49 _LWC122 48 _LL104 39 _LWC119 32 _LL101 29 _LWC115 20 _LL102 15 tnow 49552 i 49554 j 49556 k 49558 PA 49560 0: ; iospace: 49552=49152+400 EQU tnow ; tnow[65535..0] 1: ; iospace: 49554=49152+402 EQU i ; i[65535..0] 2: ; iospace: 49556=49152+404 EQU j ; j[65535..0] 3: ; iospace: 49558=49152+406 EQU k ; k[65535..0] 4: ; iospace: 49560=49152+408 EQU PA ; PA[15..0][1000] 5: ; Start of VM compile 6: lodi R999,=0 >>vReg[65535..0][1000][999]:=0 7: lod R0,tnow[R999] >>vReg[65535..0][1000][0]:=mem[vReg[65535..0][1000][999]+49552] 8: push R0 >>{mem[sp]:=vReg[65535..0][1000][0],sp:=sp-2} 9: lodi R0,=LIT113; 219 >>vReg[65535..0][1000][0]:=219 10: push R0 >>{mem[sp]:=vReg[65535..0][1000][0],sp:=sp-2} 11: jsr printf ; -1 >>{mem[sp]:=pc,{pc:=printf,sp:=sp-2}} 12: disc =2 >>sp:=sp+2+2 13: lodi R0,=0:num; 0 >>vReg[65535..0][1000][0]:=0 14: str R0,i[R999] >>mem[vReg[65535..0][1000][999]+49554]:=vReg[65535..0][1000][0] 15: _LL102: 16: lod R0,i[R999] >>vReg[65535..0][1000][0]:=mem[vReg[65535..0][1000][999]+49554] 17: lodi R1,=50:num; 50 >>vReg[65535..0][1000][1]:=50 18: cmi R2,R0, R1 >>vReg[65535..0][1000][2]:=COND(vReg[65535..0][1000][0]-vReg[65535..0][1000][1]<0, 1, 0) 19: brz R2,_LL101 ; 29 >>pc:=COND(vReg[65535..0][1000][2], pc, _LL101) 20: _LWC115: 21: lodi R2,=1:num; 1 >>vReg[65535..0][1000][2]:=1 22: lod R1,i[R999] >>vReg[65535..0][1000][1]:=mem[vReg[65535..0][1000][999]+49554] 23: str R2,PA[R1] >>mem[vReg[65535..0][1000][1]+49560]:=vReg[65535..0][1000][2] 24: lod R1,i[R999] >>vReg[65535..0][1000][1]:=mem[vReg[65535..0][1000][999]+49554] 25: lodi R2,=1:num; 1 >>vReg[65535..0][1000][2]:=1 26: add R0,R1, R2 >>vReg[65535..0][1000][0]:=vReg[65535..0][1000][1]+vReg[65535..0][1000][2] 27: str R0,i[R999] >>mem[vReg[65535..0][1000][999]+49554]:=vReg[65535..0][1000][0] 28: jmp _LL102 ; 15 >>pc:=_LL102 29: _LL101: 30: lodi R0,=2:num; 2 >>vReg[65535..0][1000][0]:=2 31: str R0,j[R999] >>mem[vReg[65535..0][1000][999]+49556]:=vReg[65535..0][1000][0] 32: _LWC119: 33: lod R0,tnow[R999] >>vReg[65535..0][1000][0]:=mem[vReg[65535..0][1000][999]+49552] 34: push R0 >>{mem[sp]:=vReg[65535..0][1000][0],sp:=sp-2} 35: lodi R0,=LIT120; 178 >>vReg[65535..0][1000][0]:=178 36: push R0 >>{mem[sp]:=vReg[65535..0][1000][0],sp:=sp-2} 37: jsr printf ; -1 >>{mem[sp]:=pc,{pc:=printf,sp:=sp-2}} 38: disc =2 >>sp:=sp+2+2 39: _LL104: 40: lod R0,j[R999] >>vReg[65535..0][1000][0]:=mem[vReg[65535..0][1000][999]+49556] 41: lodi R2,=50:num; 50 >>vReg[65535..0][1000][2]:=50 42: cmi R1,R0, R2 >>vReg[65535..0][1000][1]:=COND(vReg[65535..0][1000][0]-vReg[65535..0][1000][2]<0, 1, 0) 43: brz R1,_LL103 ; 69 >>pc:=COND(vReg[65535..0][1000][1], pc, _LL103) 44: lod R1,j[R999] >>vReg[65535..0][1000][1]:=mem[vReg[65535..0][1000][999]+49556] 45: lod R2,j[R999] >>vReg[65535..0][1000][2]:=mem[vReg[65535..0][1000][999]+49556] 46: add R0,R1, R2 >>vReg[65535..0][1000][0]:=vReg[65535..0][1000][1]+vReg[65535..0][1000][2] 47: str R0,i[R999] >>mem[vReg[65535..0][1000][999]+49554]:=vReg[65535..0][1000][0] 48: _LWC122: 49: _LL106: 50: lod R0,i[R999] >>vReg[65535..0][1000][0]:=mem[vReg[65535..0][1000][999]+49554] 51: lodi R2,=50:num; 50 >>vReg[65535..0][1000][2]:=50 52: cmi R1,R0, R2 >>vReg[65535..0][1000][1]:=COND(vReg[65535..0][1000][0]-vReg[65535..0][1000][2]<0, 1, 0) 53: brz R1,_LL105 ; 63 >>pc:=COND(vReg[65535..0][1000][1], pc, _LL105) 54: lodi R1,=0:num; 0 >>vReg[65535..0][1000][1]:=0 55: lod R2,i[R999] >>vReg[65535..0][1000][2]:=mem[vReg[65535..0][1000][999]+49554] 56: str R1,PA[R2] >>mem[vReg[65535..0][1000][2]+49560]:=vReg[65535..0][1000][1] 57: lod R2,i[R999] >>vReg[65535..0][1000][2]:=mem[vReg[65535..0][1000][999]+49554] 58: lod R1,j[R999] >>vReg[65535..0][1000][1]:=mem[vReg[65535..0][1000][999]+49556] 59: add R0,R2, R1 >>vReg[65535..0][1000][0]:=vReg[65535..0][1000][2]+vReg[65535..0][1000][1] 60: str R0,i[R999] >>mem[vReg[65535..0][1000][999]+49554]:=vReg[65535..0][1000][0] 61: _LWC125: 62: jmp _LL106 ; 49 >>pc:=_LL106 63: _LL105: 64: lod R0,j[R999] >>vReg[65535..0][1000][0]:=mem[vReg[65535..0][1000][999]+49556] 65: lodi R1,=1:num; 1 >>vReg[65535..0][1000][1]:=1 66: add R2,R0, R1 >>vReg[65535..0][1000][2]:=vReg[65535..0][1000][0]+vReg[65535..0][1000][1] 67: str R2,j[R999] >>mem[vReg[65535..0][1000][999]+49556]:=vReg[65535..0][1000][2] 68: jmp _LL104 ; 39 >>pc:=_LL104 69: _LL103: 70: lodi R2,=LIT127; 161 >>vReg[65535..0][1000][2]:=161 71: push R2 >>{mem[sp]:=vReg[65535..0][1000][2],sp:=sp-2} 72: jsr printf ; -1 >>{mem[sp]:=pc,{pc:=printf,sp:=sp-2}} 73: disc =1 >>sp:=sp+1+1 74: _LWC128: 75: lodi R2,=1:num; 1 >>vReg[65535..0][1000][2]:=1 76: str R2,i[R999] >>mem[vReg[65535..0][1000][999]+49554]:=vReg[65535..0][1000][2] 77: _LL108: 78: lod R2,i[R999] >>vReg[65535..0][1000][2]:=mem[vReg[65535..0][1000][999]+49554] 79: lodi R1,=50:num; 50 >>vReg[65535..0][1000][1]:=50 80: cmi R0,R2, R1 >>vReg[65535..0][1000][0]:=COND(vReg[65535..0][1000][2]-vReg[65535..0][1000][1]<0, 1, 0) 81: brz R0,_LL107 ; 98 >>pc:=COND(vReg[65535..0][1000][0], pc, _LL107) 82: lod R0,i[R999] >>vReg[65535..0][1000][0]:=mem[vReg[65535..0][1000][999]+49554] 83: lod R1,PA[R0] >>vReg[65535..0][1000][1]:=mem[vReg[65535..0][1000][0]+49560] 84: brz R1,_LL109 ; 91 >>pc:=COND(vReg[65535..0][1000][1], pc, _LL109) 85: lod R1,i[R999] >>vReg[65535..0][1000][1]:=mem[vReg[65535..0][1000][999]+49554] 86: push R1 >>{mem[sp]:=vReg[65535..0][1000][1],sp:=sp-2} 87: lodi R1,=LIT130; 156 >>vReg[65535..0][1000][1]:=156 88: push R1 >>{mem[sp]:=vReg[65535..0][1000][1],sp:=sp-2} 89: jsr printf ; -1 >>{mem[sp]:=pc,{pc:=printf,sp:=sp-2}} 90: disc =2 >>sp:=sp+2+2 91: _LL109: 92: _LWC131: 93: lod R1,i[R999] >>vReg[65535..0][1000][1]:=mem[vReg[65535..0][1000][999]+49554] 94: lodi R0,=1:num; 1 >>vReg[65535..0][1000][0]:=1 95: add R2,R1, R0 >>vReg[65535..0][1000][2]:=vReg[65535..0][1000][1]+vReg[65535..0][1000][0] 96: str R2,i[R999] >>mem[vReg[65535..0][1000][999]+49554]:=vReg[65535..0][1000][2] 97: jmp _LL108 ; 77 >>pc:=_LL108 98: _LL107: 99: _LWC133: 100: lodi R2,=LIT134; 153 >>vReg[65535..0][1000][2]:=153 101: push R2 >>{mem[sp]:=vReg[65535..0][1000][2],sp:=sp-2} 102: jsr printf ; -1 >>{mem[sp]:=pc,{pc:=printf,sp:=sp-2}} 103: disc =1 >>sp:=sp+1+1 104: lod R2,tnow[R999] >>vReg[65535..0][1000][2]:=mem[vReg[65535..0][1000][999]+49552] 105: push R2 >>{mem[sp]:=vReg[65535..0][1000][2],sp:=sp-2} 106: lodi R2,=LIT135; 117 >>vReg[65535..0][1000][2]:=117 107: push R2 >>{mem[sp]:=vReg[65535..0][1000][2],sp:=sp-2} 108: jsr printf ; -1 >>{mem[sp]:=pc,{pc:=printf,sp:=sp-2}} 109: disc =2 >>sp:=sp+2+2 110: lodi R2,=0:num; 0 >>vReg[65535..0][1000][2]:=0 111: push R2 >>{mem[sp]:=vReg[65535..0][1000][2],sp:=sp-2} 112: jsr sysexit ; -1 >>{mem[sp]:=pc,{pc:=sysexit,sp:=sp-2}} 113: disc =1 >>sp:=sp+1+1 114: stop >>pc:=-1 115: ; Start of litpool 116: LIT135: 117: defs 80; P 118: defs 114; r 119: defs 105; i 120: defs 109; m 121: defs 101; e 122: defs 115; s 123: defs 32; 124: defs 116; t 125: defs 101; e 126: defs 115; s 127: defs 116; t 128: defs 58; : 129: defs 32; 130: defs 99; c 131: defs 111; o 132: defs 109; m 133: defs 112; p 134: defs 108; l 135: defs 101; e 136: defs 116; t 137: defs 101; e 138: defs 32; 139: defs 97; a 140: defs 116; t 141: defs 32; 142: defs 116; t 143: defs 110; n 144: defs 111; o 145: defs 119; w 146: defs 61; = 147: defs 37; % 148: defs 105; i 149: defs 46; . 150: defs 10; 151: defs 0; 152: LIT134: 153: defs 10; 154: defs 0; 155: LIT130: 156: defs 37; % 157: defs 105; i 158: defs 32; 159: defs 0; 160: LIT127: 161: defs 84; T 162: defs 104; h 163: defs 101; e 164: defs 32; 165: defs 112; p 166: defs 114; r 167: defs 105; i 168: defs 109; m 169: defs 101; e 170: defs 115; s 171: defs 32; 172: defs 97; a 173: defs 114; r 174: defs 101; e 175: defs 58; : 176: defs 0; 177: LIT120: 178: defs 80; P 179: defs 114; r 180: defs 105; i 181: defs 109; m 182: defs 101; e 183: defs 115; s 184: defs 32; 185: defs 116; t 186: defs 101; e 187: defs 115; s 188: defs 116; t 189: defs 58; : 190: defs 32; 191: defs 99; c 192: defs 108; l 193: defs 101; e 194: defs 97; a 195: defs 114; r 196: defs 101; e 197: defs 100; d 198: defs 32; 199: defs 97; a 200: defs 114; r 201: defs 114; r 202: defs 97; a 203: defs 121; y 204: defs 32; 205: defs 97; a 206: defs 116; t 207: defs 32; 208: defs 116; t 209: defs 110; n 210: defs 111; o 211: defs 119; w 212: defs 61; = 213: defs 37; % 214: defs 105; i 215: defs 32; 216: defs 10; 217: defs 0; 218: LIT113: 219: defs 80; P 220: defs 114; r 221: defs 105; i 222: defs 109; m 223: defs 101; e 224: defs 115; s 225: defs 32; 226: defs 116; t 227: defs 101; e 228: defs 115; s 229: defs 116; t 230: defs 32; 231: defs 37; % 232: defs 105; i 233: defs 32; 234: defs 115; s 235: defs 116; t 236: defs 97; a 237: defs 114; r 238: defs 116; t 239: defs 105; i 240: defs 110; n 241: defs 103; g 242: defs 10; 243: defs 0; 244: ; End of litpool 245: ; End of VM compile