(* // HPRLS microcode_hdr.sml // HPRLS H2 Microcontroller ISA specification. *) (* Branches *) val i_jsr = { nm="jsr", am="L", p="[sp]=pc;pc=L,sp=sp-2", e="[15:12]=1,[11:0]=L" }; val i_jmp = { nm="jmp", am="L", p="pc=L", e="[15:12]=2,[11:0]=L" }; val i_brz = { nm="brz", am="RL", p="pc=R?pc:L", e="[15:12]=4,[11:9]=R,[2:0]=L"}; (* Jumps: *) val i_jmpr = { nm="jmpr", am="(R)", p="pc=D", e="[15:12]=5, [2:0]=D"}; val i_brzr = { nm="brzr", am="R,(R)", p="pc=R?pc:D", e="[15:12]=6,[11:9]=R,[2:0]=D"}; val i_jsrr = { nm="jsrr", am="(R)", p="[sp]=pc;pc=D,sp=sp-2",e="[15:12]=7, [2:0]=D"}; (* Miscellaneous instructions: *) val i_rts = { nm="rts", am="0", p="sp=sp+2;pc=[sp]", e="[15:12]=3,[11:8]=0" }; val i_stop = { nm="stop", am="0", p="pc=-1", e="[15:12]=3,[11:8]=1" }; val i_nop = { nm="nop", am="0", p="", e="[15:12]=3,[11:8]=2" }; val i_disc = { nm="disc", am="R", p="sp=sp+R+R", e="[15:12]=3,[11:8]=3,[2:0]=R"}; val i_rslt = { nm="rslt", am="R", p="x=R", e="[15:12]=3,[11:8]=4,[2:0]=R"}; val i_push = { nm="push", am="R", p="[sp]=R,sp=sp-2", e="[15:12]=3,[11:8]=5,[2:0]=R"}; val i_pop = { nm="pop", am="R", p="sp=sp+2,R=[sp]", e="[15:12]=3,[11:8]=6,[2:0]=R"}; (* Immediate addressing: *) val i_addi = { nm="addi", am="Di", p="D=D+i", e="[15:12]=5,[11:9]=D,[8:0]=i"}; val i_subi = { nm="subi", am="Di", p="D=D-i", e="[15:12]=6,[11:9]=D,[8:0]=i"}; val i_lodi = { nm="lodi", am="Di", p="D=i", e="[15:12]=7,[11:9]=D,[8:0]=i"}; (* Data processing ALU operations: *) val i_add = { nm="add", am="DAB", p="D=A+B", e="[15:14]=1,[13:9]=0,[8:6]=A,[5:3]=B,[2:0]=D"}; val i_sub = { nm="sub", am="DAB", p="D=A-B", e="[15:14]=1,[13:9]=1,[8:6]=A,[5:3]=B,[2:0]=D"}; val i_xor = { nm="xor", am="DAB", p="D=A^B", e="[15:14]=1,[13:9]=2,[8:6]=A,[5:3]=B,[2:0]=D"}; val i_and = { nm="and", am="DAB", p="D=A&B", e="[15:14]=1,[13:9]=3,[8:6]=A,[5:3]=B,[2:0]=D"}; val i_or = { nm="or", am="DAB", p="D=A|B", e="[15:14]=1,[13:9]=4,[8:6]=A,[5:3]=B,[2:0]=D"}; val i_not = { nm="not", am="DA", p="D=!A", e="[15:14]=1,[13:9]=5,[8:6]=A,[5:3]=B,[2:0]=D"}; val i_neg = { nm="neg", am="DA", p="D=~A", e="[15:14]=1,[13:9]=6,[8:6]=A,[5:3]=B,[2:0]=D"}; val i_mov = { nm="mov", am="DA", p="D=A", e="[15:14]=1,[13:9]=7,[8:6]=A,[5:3]=B,[2:0]=D"}; val i_adc = { nm="adc", am="DAB", p="D=A+B+c", e="[15:14]=1,[13:9]=8,[8:6]=A,[5:3]=B,[2:0]=D"}; val i_sbb = { nm="sbb", am="DAB", p="D=A-B+c", e="[15:14]=1,[13:9]=9,[8:6]=A,[5:3]=B,[2:0]=D"}; val i_mul = { nm="mul", am="DAB", p="D=A*B", e="[15:14]=1,[13:9]=10,[8:6]=A,[5:3]=B,[2:0]=D"}; val i_cmi = { nm="cmi", am="DAB", p="D=(A-B)<0?1:0", e="[15:14]=1,[13:9]=11,[8:6]=A,[5:3]=B,[2:0]=D"}; val i_cpz = { nm="cpz", am="DAB", p="D=(A-B)==0?1:0", e="[15:14]=1,[13:9]=11,[8:6]=A,[5:3]=B,[2:0]=D"}; val i_rol = { nm="rol", am="DAB", p="D=(A<<1)|(A>>15)", e="[15:14]=1,[13:9]=12,[8:6]=A,[5:3]=B,[2:0]=D"}; val i_lsr = { nm="lsr", am="DAB", p="D=(A>>1)|(D&32768)", e="[15:14]=1,[13:9]=13,[8:6]=A,[5:3]=B,[2:0]=D"}; val i_asr = { nm="asr", am="DAB", p="D=A>>1", e="[15:14]=1,[13:9]=14,[8:6]=A,[5:3]=B,[2:0]=D"}; val i_asl = { nm="asl", am="DAB", p="D=A<<1", e="[15:14]=1,[13:9]=15,[8:6]=A,[5:3]=B,[2:0]=D"}; val i_ror = { nm="ror", am="DAB", p="D=(A>>1)|(A<<15)", e="[15:14]=1,[13:9]=16,[8:6]=A,[5:3]=B,[2:0]=D"}; (* Load: 8000-BFFF. Store :C000-FFFF store *) val i_lod = { nm="lod", am="RX", p="R=[X+b]", e="[15:14]=2,[13]=0,[12:10]=R,[9:7]=X,[6:0]=b"}; val i_str = { nm="str", am="RX", p="[X+b]=R", e="[15:14]=3,[13]=0,[12:10]=R,[9:7]=X,[6:0]=b"}; val i_lodb = { nm="lodb", am="RX", p="R=m8[X+b]", e="[15:14]=2,[13]=1,[12:10]=R,[9:7]=X,[6:0]=b"}; val i_strb = { nm="strb", am="RX", p="m8[X+b]=R", e="[15:14]=3,[13]=1,[12:10]=R,[9:7]=X,[6:0]=b"}; val uisa_set = [ i_jsr, i_jmp, i_brz, i_jmpr, i_brzr, i_jsrr, i_rts, i_stop, i_nop, i_disc, i_rslt, i_push, i_pop, i_addi, i_subi, i_lodi, i_add, i_sub, i_xor, i_and, i_or, i_not, i_neg, i_mov, i_adc, i_sbb, i_mul, i_cmi, i_cpz, i_rol, i_lsr, i_asr, i_asl, i_ror, i_lod, i_str ]; // eof