This is the same slide as before!
The major EDA companies, Synopsys, Cadance and Mentor all heavily pushing C-to-Gates flows.
Altera (Intel) and Xilinx, the FPGA vendors, are now also promoting HLS tools.
IC industry is still highly skeptical!
Success of formal verification means abundance of formal specs for protocols and interfaces: automatic glue synthesis seems highly-feasible.
Synthesis from formal spec - academic interest only ? Except for glue logic.
|55: (C) 2012-17, DJ Greaves, University of Cambridge, Computer Laboratory.|