Various laboratory technical reports and Ph.D dissertations also include additional information over and above that present here. A substantial work on ATM can be found in Simon Crosby's thesis (technical report TBA). Information on Fairisle can be found in SIGCOMM'94. A Recent publication on the Desk Area Network can be found in IEEE JSAC 13(4).
One of the big changes from previous years is that this document has got a lot smaller. There are two reasons for this. First, unlike previous years, this collection only contains documents which are new. Documentation on older hardware and software is not reproduced here, due to the high availablity of older collections in print and on the web.
Second, the Systems Research Group has recently been very much more concerned with applying ATM (resource managment) ideas within the context of operating system research. The development of the Nemesis Operating System is one result of this work. Documentation of Nemesis is beyond the scope of this particular work, but can be found on the Web at http://www.cl.cam.ac.uk/Research/SRG/
Postscript versions of recent technical reports can also be found on ftp.cl.cam.ac.uk in directory /public/papers/reports. Paper copies of technical reports can be ordered by sending mail to tech-reports@cl.cam.ac.uk
AAL | ATM Adaptation Layer |
ACK | Acknowledge |
ADC | Analogue Digital Convertor |
ALO | At Least Once (RPC semantics) |
AMO | At Most Once (RPC semantics) |
ANSA | Advanced Networked Systems Architecture |
ARM | Advanced RISC Machine |
ASIC | Application Specific Integrated Circuit |
ATM | Asynchronous Transfer Mode |
AUU | ATM User User indication, "the bit", end of AAL5 block marker |
AVA | ATM Video Adaptor |
BARF | Broken |
B-ISDN | Broadband Integrated Services Digital Network |
BT | British Telecom |
CAC | Connection Admission Control |
CBN | Cambridge Backbone Network |
CBR | Constant Bit Rate |
CCD | Charge Coupled Detector (part of a camera) |
CCITT | Comitée Consultatif International Télégraphique et Téléphonique (now the ITU-TS) |
CLP | Cell Loss Priority (a bit in a B-ISDN cell header) |
CRC | Cyclical Redundancy Check |
CUCL | University of Cambridge Computer Laboratory |
DAC | Digital to Analogue Convertor |
DAN | Desk Area Network |
DCT | Discrete Cosine Transform (used in video compression) |
DFS | DAN Frame Store |
DMA | Direct Memory Access |
DPL | Distributed Programming Language (part of ANSA) |
DRAM | Dynamic RAM |
DSP | Digital Signal Processor |
E1 | 2 Mbit/sec |
E2 | 8 Mbit/sec |
E3 | 34 Mbit/sec |
EATM | EISA ATM (an adaptor) |
ECL | Emitter Coupled Logic |
EDL | Ethernet Data Link |
EISA | Enhanced Industry Standard Architecture (a bus) |
ESIC | EISA control ASIC |
EXO | Exactly Once (RPC semantics) |
FDDI | Fiber Distributed Data Interface |
FAS | Framing and Sequencing |
FDL | Forty-eight Data Link |
FIFO | First In First Out |
FIQ | Fast Interrupt Request (on ARM processors) |
FPC | Fairisle Port Controller |
FPC1 | Fairisle Port Controller Revision 1 |
FPC2 | Fairisle Port Controller Revision 2 |
FPC3 | Fairisle Port Controller Revision 3 |
FPGA | Field Programmable Gate Array |
FRC | Free Running Clock |
GFC | Generic Flow Control (a 4 bit field in a B-ISDN cell header) |
H.261 | A constant bit rate video compression standard. |
HEC | Header Error Check (an 8 bit CRC in a B-ISDN cell) |
IDL | Interface Definition Language (part of ANSA) |
IOB | Input Output Block (on a Xilinx FPGA) |
IOC | Input Output Controller |
IP | Internet Protocol |
IPA | India Pale Ale |
IRQ | Interrupt Request |
ISDN | Integrated Services Digital Network |
ISO | International Standards Organisation |
ITU | International Telecommunication Union |
JSAC | Journal Select Area Communications ("jay sack") |
JPEG | Joint Photographic Experts Group (a video compression standard) |
LAN | Local Area Network |
LCA | Logic Cell Array |
LRU | Least Recently Used |
MAC | Media Access Control |
MAN | Metropolitan Area Network |
MDH9 | The DAN CPU Node |
MDL | Media Data Link |
MEMC | Memory Controller |
MIDDL | Mothy's Interface Definition Language |
MMU | Memory Management Unit |
MPEG | Motion Picture Experts Group (a video compression standard) |
MPS | Message Passing Service (part of ANSA) |
MSDL | MultiService Data Link |
MSDR | MultiService Data Representation (the wire data format for MSRPC) |
MSNL | MultiService Network Layer |
MSNA | MultiService Network Architecture |
MSRPC | MultiService RPC |
MSRPC2 | MultiService RPC Version 2 |
NACK | Negative Acknowledgement |
NOSSDAV | Network and Operating System Support for Digital Audio and Video ("nose dive") |
NETCON | Network Console |
NNI | Network Network Interface |
NPC | Null Port Controller |
NRL | Nemesys Research Ltd. |
OC3 | 155 Mbit/sec |
OC12 | 622 Mbit/sec |
ORL | Olivetti Research Limited (Cambridge) |
OS | Operating System |
OSI | Open Systems Interconnection |
PAL | Programmable Array Logic |
PCB | Printed Circuit Board |
PDH | Plesiochronous Digital Hierarchy |
PDU | Protocol Data Unit (a packet) |
PIO | Programmed Input Output |
PLT | Payload Type (a 3 bit field in a B-ISDN cell header) |
PTM | Packet Transfer Mode |
Q.93B | The Standard (i.e. awful) ATM signalling protocol |
QOS | Quality of Service |
RARP | Reverse Address Resolution Protocol |
REX | Remote Execution Protocol (part of ANSA) |
RGB | Red, Green, Blue (video decomposition) |
RISC | Reduced Instruction Set Computer |
RPC | Remote Procedure Call\end{list} |
SAM | Serial Access Memory |
SAP | Service Access Point (a communications endpoint) |
SAR | Segmentation and Reassembly |
SAS | Single Address Space |
SBUS | Sun Bus |
SDH | Synchronous Digital Hierarchy |
SDL | Standard Data Link |
SDU | Service Data Unit (a packet) |
SOC | Start of Cell |
SONET | Synchronous Optical Network |
SPROING | To Break |
SRAM | Static RAM |
SSCOP | Signalling System Common Operations Protocol (the standard (i.e. awful) transport protocol for carrying Q.93B) |
STM | Synchronous Transfer Mode |
STS1 | 155 Mbit/sec |
STS4 | 622 Mbit/sec |
T1 | 1.5 Mbit/sec |
T3 | 45 Mbit/sec |
TAXI | Transparent Asynchronous Transmitter/Receiver Interface |
TBUF | Tristate Buffer (on a Xilinx FPGA) |
TDM | Time Division Multiplexing |
TPDRAM | Triple Ported DRAM |
TLB | Translation Lookaside Buffer |
UDL | Unison Data Link |
UNI | User Network Interface |
VC | Virtual Channel or Virtual Circuit |
VCI | Virtual Circuit Identifier (also Virtual Channel Identifier) |
VM | Virtual Memory |
VP | Virtual Path |
VPI | Virtual Path Identifier |
VRAM | Video RAM |
WAN | Wide Area Network |
WDBS | Wanda Dumb Boot Server |
WDFS | Wanda Dumb File System |
WJWP | Wanda Jumping Window Police |
XDR | External Data Representation (the wire data format for SUN RPC) |
Xi3 | Xilinx revision 3 |
Xi5 | Xilinx revision 5 |
Xi6 | Xilinx revision 6 |
XTB | Xilinx Teaching Board |
YCC | Luminance Chrominance Chrominance (video decomposition) |
YUV | Luminance Chrominance Chrominance (video decomposition) |