Research2005--2007: 'on-chip networks'; 'self-timed circuits'; 'electromagnetic analysis'; 'security evaluation'; 'TFT technology'; 'network-on-chip architectures'; 'improved security characteristics'; 'cryptography implementation'; 'device security enhancement'; 'NOC design'; 'design time'; 'asynchronous PLA'; 'improved input power dynamic range in semiconductor optical amplifier switches'; 'vector co-processor for public key cryptography'; 'computer languages'; 'energy exploration'; 'asynchronous interconnect architecture'; 'vector approach'; 'synchronous systems'; 'multi-wavelength data encoding'; 'hardware-software codesign'; 'pulse-based interconnect'; 'dynamic-logic PLA'; 'intelligent interactive online tutor'; 'timing regime';
2000--2004: 'on-chip networks'; 'self-timed circuits'; 'asynchronous circuits'; 'electromagnetic analysis'; 'security evaluation'; 'smart card applications'; 'hardware stream processing'; 'self-checking asynchronous logic'; 'high precision timing signals'; 'asynchronous control'; 'device security enhancement'; 'multithreaded processor design'; 'statically-allocated languages'; 'embedded systems'; 'asynchronous PLA'; 'self-timed ASIC design'; 'capacitance sensors'; 'multithreaded embedded processors'; 'java-multithreading architecture'; 'optical fault induction attacks'; 'gals interconnect'; 'low-latency virtual-channel routers'; 'point-to-point gals interconnect'; 'three-dimensional visualisation'; 'channel communication'; 'springbank test chip'; 'distributed clock generator'; 'encoded datapaths'; 'stoppable clocks'; 'circuit level defences'; 'simulation methodsology'; 'recalibrated delay line'; 'time-multiplexed autostereoscopic'; 'large-screen autostereoscopic'; 'synchronous subsystems'; 'microprocessor resistant'; 'power analysis attack'; 'security investigations'; 'independent clock domains'; 'ASIC design'; 'asynchronous processors'; 'ROM design';
1995--1999: 'self-timed circuits'; 'asynchronous circuits'; 'multithreaded processor design'; 'self-timed ASIC design'; 'synchronous circuits'; 'rotary pipeline processors'; 'flow table synthesis'; 'geometry planning'; 'tagged up/down sorter'; 'hybrid completion detection'; 'hardware priority queue'; 'asynchronous design'; 'rapid prototyping'; 'frequency locked loops';
1990--1994: 'gas mixture analysis'; 'modified multilayer perceptron models'; 'recursive move machine'; 'predictable memory structures';
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