Computer Architecture Group

Projects and research topics

Please consult the personal web pages of group members to see the board range of projects and research interests.

Current Funded Projects

• Loki processor
• CTSRD - Rethinking the hardware-software security interface
• HELIX - Automatic parallelisation
• POETS - Architectures for massively-parallel event triggered systems
• IOSEC - Protection and Memory Safety for Input/Output Security
• SafeBet - Memory capabilities to enable safe, aggressive speculation in processors

We've developed a variety of hardware platforms to support this research.

Research Topics

Languages and compilers for multi-core architectures

• Compiling for fine-grain parallel processing arrays
• Task partitioning for multi-core network processors

On-chip and multi-chip interconnection networks

• Low-latency and low-power on-chip networks
• Multi-wavelength optical switch networks (Opt-Net)
• Enhancing FPGA architectures with on-chip networks
• On-chip fault-tolerant communication
• Locally-clocked and asynchronous on-chip networks
• Asynchronous, area-efficient, pulse-based interconnects

Processor Architecture

• Low-complexity superscalar processor architectures
• Techniques for improving cache utilisation

Programmable processing substrates

• Fine-grain parallel communication-centric processor architectures
• Active on-chip networks
• Flexible support for speculation, synchronization and coherency

Selected Previous Projects

MRC2 - Resilient cloud computing

MRC2 built on the CTSRD project by extending the techniques to multiprocessors and multirack systems, and added many networking components.

BIMPA - Biologically inspired massively parallel architectures

The BIMPA project looked at full-custom FPGA-based compute pipelines and also distributed vector processors on FPGA for high performance neural execution. See the BIMPA project page for more details.

Communication centric computer design

• This project focused on communication as a first class design constraint.
• One outcome was Dan Greenfield's award winning Ph.D. thesis on Communication Locality in Computation: Software, Chip Multiprocessors and Brains
• The Communication centric computer design (C3D) project

Hardware security

• Technology- and circuit-level countermeasures to side-channel analysis attacks
• 3rd generation smart card project (G3Card)

Sensor networks

• WiredSense - Dense wired sensor networks

Novel approaches to system-timing

• Self-timed circuitry for global clocking
• Globally-Asynchronous Locally-Synchronous (GALS) systems
• Data-driven clocking
• Asynchronous circuit and processor design