ECAD

Lecturer: Dr S.W. Moore (swm11@cl.cam.ac.uk)

No. of lectures + practicals: 8 + 7

Prerequisite courses: Digital Electronics, Structured Hardware Design

This course is a prerequisite for VLSI Design (Part II).

Aims

This course aims to introduce electronic computer aided design (ECAD) with a particular emphasis on the Verilog hardware description language.

The material covered in the initial lectures is vital for the mandatory ECAD+Architecture afternoon workshops.

Lectures

• Schematics, netlists and structural HDL

• Verilog HDL

• Logic simulation

• Implementation technologies

• Design flow and interchange formats

• Verilog systems design

• Logic synthesis and optimisation

• Chip, board and system testing

Objectives

At the end of the course students should

• be able to design and prototype circuits using Verilog targeted at programmable gate arrays

• understand circuit simulation

• have knowledge of circuit testing techniques

• appreciate the ASIC design flow

Recommended books

Thomas, D.E. & Moorby, P. (1995). The Verilog Hardware Description Language. Kluwer Academic Publishers.
Sternheim, E., Singh, R., Madhaven, R. & Trivedi, Y. (1993). Digital Design and Synthesis with Verilog HDL. Automata.

From the Part IA Digital Electronics course:
Katz, R.H. (1994). Contemporary Logic Design. Benjamin/Cummings.

Pointers to sources of more specialist information are included in the lecture notes and on the associated course web page.