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Lecturer: Dr D.J. Greaves
(djg@cl.cam.ac.uk)
No. of lectures: 6
This course is a prerequisite for the Group Project
(Part IB) and
for VLSI Design (Part II).
Aims
The aims of this course are to introduce the principles and techniques
used in the design of hardware systems. The course examines the
hardware building blocks that are currently available, and discusses
how designs may be partitioned to make best use of these components.
It will be illustrated with case studies that show how a number of
``real-life'' hardware systems have been implemented.
Lectures
- Building blocks for digital electronics and HDL.
D-type, clock enable, broadside register, ROM, RAM, ALU,
microprocessor.
- Clocking and synchronous FSM combination.
Finite state machines: Mealy, Moore, composition and pipelining.
Decomposition. Set and hold times, clock skew. FSMs on different
clocks. Asynchronous boundaries. Gated clocks.
- Technology, speed, power, gate delays.
Capacitance, inductance, resistance, speed of light. Model of a gate,
derating of a model with load and temperature. Delay-power
product. Model of a net. IO pads and PCB.
Standard parts, ASICs, PALs and FPGAs. [2 lectures]
- Hardware versus software.
Processor speed, hardware speed, design reuse, full custom versus semi-custom, bit serial logic, microcode, embedded systems,
ROM and processor on the same chip. Design partitioning.
- Further circuit structures and examples.
Objectives
At the end of the course students should
- begin to be able to partition designs into appropriate hardware and
software sub-systems
- know what kinds of component are available to the hardware
designer, and know when to use software and firmware
- understand timing issues such as setup and hold times, clock
skew, propagation delays, and clock re-synchronisation
- know techniques for building state state machines that have
different performance/density tradeoffs
Recommended book
Floyd, T.L. (1997). Digital Fundamentals. Prentice-Hall.
Next: Preparatory Reading List
Up: Easter Term 2001: Part
Previous: Regular Languages and Finite
Christine Northeast
Wed Sep 20 15:13:44 BST 2000